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AD9283 Expansion module

Discussion in 'FPGA Boards' started by Kazam, Jul 3, 2015.

  1. Kazam

    Kazam New Member

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    Hi,

    I have the Mimas V2 and the AD9283 expansion module.

    I hooked them up to the two left most ports (P6 and P7) on the Mimas and proceeded to clock in the offset binary data according to the manuals, however I didn't get it to work. Playing around I found that if I invert the pin assignments as reported in the AD9283 manual it works as expected. Comment?

    Code:
    --Input register for the ADC data
    register8: reg8      port map(  reg_in  => IO_P7,
                                    LD      => '1',
                                    CLK     => clk_12mhz,
                                             reg_out => input_number
                                         );
                                             
    --Light up the appropriate segment
    sevensegmentenable <= selected_seg;
    --Hook up bcd decoder to segments
    sevensegment       <= ss_out;
    --Enable the clock divider
    enable             <= '1';
    --Hook up the LEDs to the raw ADC output
    LED                <= input_number;
    --ADC encode input (Pin3 according to manual but P6(4) is Pin4 in the .ucf)
    IO_P6(4)           <= clk_12mhz;
    --ADC pwrdwn signal (Pin4 according to manual but P6(5) is Pin3 in the .ucf)
    IO_P6(5)           <= DIP_1;
    --Set the rest to LO as they're NC.
    IO_P6(7 downto 6)  <= "00";
    IO_P6(3 downto 0)  <= "0000";
    
     
  2. admin

    admin Administrator Staff Member

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    Hello Kazam,

    I have to run this through our engineers. I'll post updates in next couple of days.

    Thanks,
    Tom
    Numato Lab
     

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